Skip to main content

8086 Memory Segmentation

Memory Segmentation

Two type of memory organisations are commonly used. These are linear addressing and segmented addressing. In linear addressing the entire memory space is available to the processor in one linear array. In the segmented addressing, on the other hand, the available memory space is divided into "chunks" called segments. Such a memory is known as segmented memory. In 8086 system the available memory space is 1Mbytes. This memory is divided into number of logical segments. Each segment is 64 K bytes in size and addressed by one of the segment registers. The 16-bit contents of the segment register give starting/base address of a particular segment, as shown in Figure. To address a specific memory location within a segment we need an offset address. The offset address is also 16-bit wide and it is provided by one of the associated pointer or index register.
Memory Segmentation

Rules of memory Segmentation

  1.  The four can overlap for small programs. In a minimum system all four segments can start at the address 00000H.
  2. The segment can begin/start at any memory address which is divisible by 16.

Advantages of memory Segmentation

  1.  It allows the memory addressing capacity to be 1 Mbyte even though the address associated with individual instruction is only 16-bit.
  2. It allows instruction code, data, stack, and portion of program to be more than 64 KB long by using more than code, data, stack segment, and extra segment.
  3.  It facilitates use of separate memory areas for program, data and stack.
  4.  It permits a program or its data to be put in different areas of memory, each time the program is executed i.e. program can be relocated which is very useful in multiprogramming.

Generation of 20-bit address

To access​ a specific memory location from any segment we need 20-bit physical address. The 8086 generates this address using the contents of segment register and the offset register associated with it. Let us see how 8086 access byte within the code segment.

We know that CS register holds base address of the code segment. The
8086 provides an instruction pointer (IP) which holds the 16-bit address of the next code byte within the code segment. The value contained in the IP is referred to as an offset. This value must be offset from (added to) the segment base address in CS to produce the required 20-bit physical address.

The contents of the CS register are multiplied by 16. i.e., shifted by 4 position to the left by inserting 4 zero bits and then the offset i.e., the contents Of IP register are added to the shifted contents of CS to generate physical address. As shown in the Figure, contents of CS register are 348AH, therefore the shifted contents of CS register are 348A0H. When the BIU adds the offset of 4214H in IP to this starting address, we get 38AB4H as a 20-bit physical address of memory. This is illustrated in Figure(b).
20-bit address generation

We have seen that the 20-bit address generated within the code segment. In the similar way 20-bit physical address is generated in the other segments. However, it is to be noted that each segment requires particular segment register and offset register to generate 20-bit physical address.

Pointers and Index Registers

All segment registers are 16-bit. But it is necessary to put 20-bit address on address bus. To get 20-bit address one or more register is associated with each segment register the way the IP is associated with CS.

These registers are belong to the pointer and Index group. The pointer and I group consists of Instruction pointer (IP), stack pointer(SP), base pointer(BP), source Index(SI), destination index(DI) registers.

  • Stack pointer (SP):  The stack pointer SP register contains the 16-bit offset from the start of the segment to the top of the stack. For stack operation, physical address is produced by adding contents of stack pointer(SP) and stack segment(SS). To do this content of SS is shifted left by 4-bits and  content of SP is added to the shifted result. If the contents of SP are 9F20H and SS are 4000H then the physical address is calculated as following.
    SS=0A00H
    SS=0A000H; After shifting 4-bits towards left.

Working of Stack Pointer

Base Pointer, source Index and Destination Index (BP, SI and DI) 

These three 16-bit registers can be used as general purpose registers. However, their main use is to hold the 16-bit offset of the data word in one of the segments.
  1.  Base pointer : We can use the BP register instead of SP for accessing the stack using the based addressing mode. In this case, the 20-bit physical stack address is calculated from BP and SS. Addressing modes are discussed in upcoming posts.
  2. Source Index : Source index (SI) can be used to hold the offset of a data word in the data segment. In this case, the 20-bit physical data address is calculated from SI and DS. 
  3. Destination Index : The ES register points to the extra segment in which data is stored. String instructions always use ES and DI to determined the 20-bit physical address for the destination.

Comments

Post a Comment

Popular posts from this blog

8051 Simple Programs

Sum of 8-bit Numbers Stored in Memory Here  we will discuss about 8051 programs but we can't discuss about all of the 8051 instructions. For programming 8051 we should know about assembler directives as well as instruction set. Click  here to download Atmel c51 user guide that will discuss about 8051(c51 family microcontroller) instruction set, assembler directives, c51 cross assembler from Atmel.  Program ORG 00H MOV R0,#50H   ; get memory location in memory pointer R0 MOV R1,#51H   ; get memory location on memory pointer register R1 MOV A,@R0       ; get content of memory location 50H to accumulator ADD A,@R1        ; add content of A with content of memory location 51H and store result in A MOV R0,#52H    ; get 52H to memory pointer R0 MOV@R0,A         ; copy content of A to memory location 52H END Add 16-bit Numbers Program ORG 00H MOV DPTR,#2040H   ; get 2040H into DPTR MOV A,#2BH              ; get lower byte of second 16-bit number on accumulator MO

Introduction to 8051 embedded C

For 8051 we need to include the file reg51.h. This file contains the all the definitions of 8051 registers. With this information C compiler produces hex file that can be downloaded into the ROM of the microcontroller. It is important to note that the size of the hex file produced by the assembly language is much larger than the hex file produced by C compiler. Apart from this fact, there is many reasons for writing programs in C instead of assembly: ●It is much easier and less time consuming to write programs in C assembly. ●C is more flexible; it is easier to modify and update. ●Programming in C allows to use code available in function libraries. ●Program written inC for one microcontroller is portable to other microcontrollers with little or no modifications. Data Types in 8051 Embedded C The table shown below lists the data types that are available in typical C51 compiler. The gives information about the size of the data variable and it's value range. Data type

8051 Keyboard Interfacing

Keyboards are organized in a matrix of rows and columns. The CPU accesses both rows and columns through ports. Therefore, with two 8-bit ports, an 8 x 8 matrix of keys can be connected to a microprocessor. When a key is pressed, a row and a column make a contact. Otherwise, there is no connection between rows and columns. In IBM PC keyboards, a single microcontroller takes care of hardware and software interfacing. A 4x4 matrix connected to two ports. The rows are connected to an output port and the columns are connected to an input port. Grounding Rows and reading Columns:- 8051 keyboard interfacing It is the function of the microcontroller to scan the keyboard continuously to detect and identify the key pressed. To detect a pressed key, the microcontroller grounds all rows by providing 0 to the output latch, then it reads the columns. If the data read from columns is D3 – D0 =1111, no key has been pressed and the process continues till key press is detected. If one of t