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sources of Interrupt in 8086 An interrupt in 8086 can be come in folowing ways: From an external signal applied to NMI or INTR input pin of the processor. The interrupts initiated by applying appropriate signals to these input pins are called hardware interrupt. The second source of interrupt is execution of the interrupt instruction "INT n", where n is the type number. The interrupt initiated by "INT n" instruction are called software interrupts. The third source of interrupt is  from some conditions produced in the 8086 by the execution of an instruction. An example of this type of interrupt 'devided by zero interrupt'. Program execution will be automatically interrupted if you attempted to divide an operand by zero. Such conditional interrups are known as exceptions. Interrupts of 8086 The 8086 microprocessor has 256 types of interrupts which come from any one of the three sources mentioned above. INTEL has assigned a type number to each interr...

The 8086 microprocessor uses a 20-bit address to access memory. With 20-bit address the processor can generate 2 20 = 1 Mega address. The basic memory word size of the memories used in the 8086 system is 8-bit or 1-byte (i.e., in one memory location an 8-bit binary information can be stored). Hence, the physical memory space of the 8086 is 1Mb (1 Mega-byte). For the programmer, the 8086 memory address space is a sequence of one mega-byte in which one location stores an 8-bit binary code/data and two consecutive locations store 16-bit binary code/data. But physically (i.e., in the hardware), the 1Mb memory space is divided into two banks of 512kb (512kb + 512kb = 1Mb). The two memory banks are called Even (or Lower) bank and Odd (or Upper) bank. The organization of even and odd memory banks in the 8086-based system is shown in Figure. The 8086-based system will have two sets of memory IC's. One set for even bank and another set for odd bank. The data lines D 0 -D 7 are conne...

Maximum mode signals The maximum mode signals of 8086 are listed in table below. The 8086 can made to work in maximum mode by grounding MN/ MX . In maximum mode, the pin 24 to pin 31 are defined as follows. Name Description/Function Type RQ / GT 1 , RQ / GT 0 Request/Grant bus access control Bidirectional LOCK Bus priority block control Output, Tristate S 2 , S 1 , S 0 Bus cycle status Output, Tristate QS 1 , QS 0 Instruction queue status Output S 0 , S 1 , S 2 : These are status signals and they used by the 8288 bus controller to generate the bus timing and control signals. The status signals are decoded as shown in table: Status Signal Machine Cycle S 2 S 1 S 0 0 0 0 Interrupt acknowlegement 0 0 1 Read IO port 0 1 0 Write IO port 0 1 1 Halt 1 0 0 Code access 1 0 1 Read memory 1 1 0 Write memory 1 1 1 Passive/Inactive RQ / GT 0 , RQ / GT 1 (Bus Request/Bus Grant): These reques...

Minimum Mode Signals The minimum mode signals of an 8086 are listed in table below. For minimum mode of operation the MN/ MX pin is tied to V cc (logic high). In minimum mode, the 8086 itself generates all bus control signals. The minimum mode signals are explained below: Name Description/Function Type HOLD Hold request Input HLDA Hold acknowledgement Output WR Write control Output, Tristate M/ IO Memory/IO control Output, Tristate DT/ R Data transmit/Recieve Output, Tristate DEN Data enable Output, Tristate ALE Address latch enable Output INTA Interrupt acknowledge Output DT/ R (Data Transmit/Receive): It is an output signal from the processor to control the direction of data flow through the data transceivers. DEN (Data Enable) : It is an output signal from the processor used as output enable for the data transceivers. ALE(Address Latch Enable): It is used to demultiplex the address and data lines using external lat...

8086 Pin Out Diagram 8086 Pin Out Diagram The signals of 8086 microprocessor is classified into three. They are common mode signals, minimum mode signals, and maximum mode signals. Common mode signals The lower sixteen lines of the address are multiplexed with data and the upper four lines of the address are multiplexed with status signals. During the first clock period of a bus cycle the entire 20-bit address is available on these lines. During all other clock periods of a bus cycle, the data and status signals will be available on these lines. Name Description/Function Type AD 15 -AD 0 Address/Data Bidirectional, Tristate A 19 /S 6 -A 16 /S 3 Address/Status Output/Tristate BHE /S 7 Bus High Enable/Status Output/Tristate MN/ MX Minimum/Maximum mode control Input RD Read Control Output, Tristate TEST Wait on test control Input READY Wait state control Input RESET System reset Input NMI Non-maskable interrupt request Inpu...

8086 Block Diagram Figure shows internal architecture of 8086. It is internally decided into two functional units: Bus Interface Unit(BIU) Execution Unit These functional units can work simultaneously to increase the system speed and hence the throughput. Throughput is the measure of instruction executed per unit time. 8086 Internal Architecture Block Diagram 1. Bus Interface Unit(BIU) The bus interface unit is the 8086's interface to the outside world. It provides a full 16-bit bi-directional data bus and 20-bit address bus. The BIU is responsible for performing all external bus operations, as listed below. Functions of Bus Interface Unit t sends address of memory or I/O It fetches instruction from memory. It reads data from port/memory. It writes data into port/memory. It supports instruction queueing. It provides the address relocation facility. To implement these functions the BIU contains, the instruction queue, segment registers instruction ...

The Intel 8086 In 1978, Intel(Integrated Electronics) came out with the 8086 processor. The Intel 8086 is a 16-bit microprocessor, implemented in N-channel, depletion load, silicon gate technology(HMOS), and packaged it in a 40 pin dual in line package. In this blog , we study  fearures, architecture, register organisarion, bus operation and memory segmentation etc. Features of 8086 The 8086 is a 16-bit microprocessor. The term "16-bit" means that its arithmetic logic unit, internal registers and most of its instructions are designed to work with 16-bit binary words. The 8086 has a 16-bit data bus, so it can read data from or write data to memory and ports either 16 bits or 8 bits at a time.  The 8086 has a 20-bit address bus, so it can directly access 2 20 or 10,48,576 (1Mb) memory locations. Each of the 10,48,576 memory locations is byte wide. Therefore the 16-bit words are stored in two consecutive memory locations. The 8086 can generate 16-bit I/O addr...