Transistor Amplifier Design

Requirements

Voltage Gain: 50
Required output voltage swing: 10V

Selection of Transistor

Select transistor BC107 since minimum guaranteed \(h_{FE}\)(=100) is more than the required gain(=50) of the amplifier.

Quick Reference Through BC107

Type: NPN Silicon
Application: In audio frequency

Maximum Ratings:

\(V_{CB}=50V, V_{CE}=45V,\\ V_{EB}=6V, I_C=100mA\)

Nominal Ratings:

\(V_{CE}=5V,  I_c=2mA, h_{FE}=100 \text{ to } 500\)

CE amplifier circuit diagram

DC Biasing Conditions

\(V_{CC}\) is taken as \(20\%\) more than required output voltage swing. Hence \(V_{CC}=12V\). \(I_c=2mA\), because \(h_{FE}\) is guaranteed 100 at that current as per data sheet. In order to make the operating point at the middle of the load line, assume the DC conditions as follows:
\(V_{RC}=40\% \text{ of } V_{CC}=4.8V\)
\(V_{RE}=10\% \text{ of } V_{CC}=1.2V\)
\(V_{CE}=50\% \text{ of } V_{CC}=6V\)

Design of \(R_C\)

\(V_{RC}=I_C×R_C=4.8V\). From this we get \(R_C=2.4K\Omega.\text{ Use }2.2K\Omega\).

Design of \(R_E\)

\(V_{RE}=I_E×R_E=1.2V\). From this, we get \(R_E=600\Omega\) because \(I_c \approx I_E\). Use\( 680\Omega\) standard resistance.

Design of \(R_1\) and \(R_2\)

Assume the current through \(R_1=10I_B\) and that through \(R_2=9I_B\) for a stable voltage across \(R_1\) and \(R_2\) independent of variation of base current.
\(V_{R2}=\) Voltage drop across \(R_2\)
$$=V_{BE}+V_{RE}$$ \(V_{R2}=V_{BE}+V_{RE}=0.6+1.2=1.8V\)
But \(I_B=\frac{I_C}{h_{FE}}=\frac{2mA}{100}=20\mu A\)
Then,
 \(R_2=\frac{V_{R2}}{9I_B}=\frac{1.8}{9×20×10^{-6}}=10K\Omega\)
\(V_{R1}=\) Voltage across\(R_1\) $$=V_{CC}-V_{R2}=12-1.8=10.2V$$ Also, \(V_{R1}=10I_BR_1=10.2V\) Then, \(R1=\frac{10.2}{10×20×10^{-6}}=50K\Omega\). Select \(47K\Omega\) standard resistance value.

Design of \(R_L\)

Gain of the CE amplifier, \(A_V=-(r_c/r_e)\)

Where \(r_c=R_C\|R_L\) and

\(r_e=\frac{25mV}{I_E}=\frac{25mV}{2mA}=12.5\Omega\).

Since the required gain is 50, substituting in the expression we get, \(R_L=845\Omega\). Use 820\(\Omega\) standard resistance.

Design of Coupling Capacitor \(C_{C1}\) and \(C_{C2}\)

\(X_{C1}\) should be less than the input impedance of the transistor. Here \(R_{in}\) is the series impedance.

As rule of thumb, take, \(X_{C1}=\frac{R_{in}}{10}\).

Here \(R_{in}=R_1\|R_2\|(1+h_{FE}r_e)\) since \(R_E\) is bypassed by the capacitor and effective emitter resistance \(r_e\).

We get \(R_{in}=1.1k\Omega\). Then \(X_{C1}\leq 110\Omega\)

Assuming lowest cut-off frequency \(f_L\) of 100 Hz.

\(C_{C1}\geq \frac{1}{2πf_L×110}=14\mu F\). Use \(15\mu F\) standard capacitor.

Similarly \(X_{C2}\leq \frac{R_{out}}{10}\) where \(R_{out}=R_C\).

Then \(X_{C2}\leq240\Omega\)
So, \(C_{C2}\geq \frac{1}{2π×100×240}=6.6\mu F\). Use \(10\mu F\) standard capacitor.

Design of Bypass Capacitor \(C_E\)

To bypass the lowest frequency (say 100Hz) \(X_{CE}\) should be less than or equal to the resistance \(R_E\).

As a rule of thumb, take \(X_{CE}=\frac{R_E}{10}\).

Then, \(C_E=\frac{1}{2π×100×68}=23\mu F\). Use \(22\mu F\) standard capacitor.